CS6230: CAD for VLSI Systems

A practical, project-based course on end-to-end CAD flows for VLSI systems, taught from the perspective of Computer Architecture.


Instructors
Gopalakrishnan Srinivasan SSB 202, Dept. of Computer Science and Engineering, IIT Madras
e-mail: sgopal@cse.iitm.ac.in
Purushothaman Ramakrishnan RISE LAB, Dept. of Computer Science and Engineering, IIT Madras
e-mail: puru_rise@icsrpis.iitm.ac.in
Introduction

This course is a practical and project based introduction to end-to-end CAD (Computer-Aided Design) flows for VLSI systems, from RTL to layout. It covers topics spanning RTL design using Bluespec System Verilog, logic synthesis, and physical design (placement and routing). It targets self-motivated graduate students and upper-level undergraduates interested in pursuing hardware design and computer architecture in greater depth, potentially for a research project or thesis.

Evaluation
Component Weight
Assignment -1 RTL Design using Bluespec System Verilog 4%
Synthesis (Understanding and Implementation) 6%
Assignment -2 RTL Design using Bluespec System Verilog 4%
Placement and Routing (Understanding and Implementation) 6%
Mid Semester 20%
End Semester 30%
Project 30%
Time Table & Location

Taught in the A slot, in the CS24 of the CSE Department:

Day Time
Monday8:00 – 8:50
Tuesday12:00 – 12:50
Thursday11:00 – 11:50
Friday10:00 – 10:50
Class Schedule (Tentative)
Week Dates Important Dates Topic and Lecture Slides Assignments
Week 1 Jul 27 - 31 Intro to Shakti Accelerators
Week 2 Aug 3 - 7 Intro to ASIC and BSV
Week 3 Aug 10 - 14 Standard Cells and Terminologies
Week 4 Aug 17 - 21 TCL & BSV
Week 5 Aug 24 - 28 Cont. of prev week
Week 6 Aug 31 - Sep 4 Give Assignment-1 Specification 01/09/2026 - Assignment 1 release date Interface methods & IO Ring Design Assignment 1
Week 7 Sep 7 - 11 DFT & Intro to Rules
Week 8 Sep 14 - 18 18/09/2026 - Assignment 1 deadline Rule Scheduling,ESD,Floorplan
Week 9 Sep 21 - 25 21th Thursday (Mid Sem Exam - 7:30 AM) PVT,Placement,CTS
Week 10 Sep 28 - Oct 2 28th Friday Give Assignment-2 Specification Midsem solutions discussion Assignment 2
Week 11 Oct 5 - 9 Assignment-2 Submission (5th Oct)
Give Project Specification (6th Oct)
Register Types
Week 12 Oct 12 - 16 Branch Prediction, OCV & STA
Week 13 Oct 19 - 23 IC Packages
Week 14 Oct 26 - 30 FIFO
Week 15 Nov 2 - 6
Week 16 Nov 9 - 13 End Semester Exam (10th Nov) | Project Submission (end of week)
Exam Slot Nov 16-20 Late Project Submission ( with mark deduction)
Teaching Assistants